CAM is a memory which can search for stored data that matches reference data and read information associated with matching data, such as an address indicating a location in which the matching data is stored. As a semiconductor technology advances, CAM is required to be accessible at high speed in higher density and to consume low power.
FIG. 1 shows an example of a conventional static CAM cell (excerpted from p.310, "The Principles of CMOSVLSI Design"). A CAM cell 10 comprises a data storage part 11 comprising a pair of inverters, each comprising CMOS transistors, an output of one inverter being connected to an input of the other inverter; and transfer gates 14 and 15, each comprising an NMOS transistor, the transfer gate 14 being situated between a bit line 12 and the data storage part 11, the transfer gate 15 being situated between a bit line 13 and the data storage part 11. A word line is connected to each gate of the transfer gates 14 and 15. The CAM cell 10 further comprises NMOS transistors 16 and 17 connected in series to the bit lines 12 and 13. The respective gates of the transistors 16 and 17 are connected to the respective outputs of the inverters. A bit match node 18 between the transistors 16 and 17 is connected to the gate of an NMOS transistor 19. The transistor 19 is connected to a word match line 20 so that it functions as the transistor for driving the word match line 20.
The CAM cell 10 of FIG. 1 has problems about the low power consumption and the high speed, as described below. That is, the bit lines 12 and 13 are precharged at a high level for a read operation. In this case, the bit match node 18 reaches the high level because the transistor 16 or 17 is on. The driving transistor 19 is then turned on, so that the word match line 20 is discharged at a low level. On the other hand, a search operation requires precharging the word match line 20 at the high level. In this case, it is necessary to fix the bit lines 12 and 13 at the low level.
When a search request is received while the CAM prepares for the read operation in its stand-by state, it is therefore necessary to once discharge the bit lines 12 and 13 prior to the search operation. Then, the search operation can not start until the word match line 20 is charged to the high level. Consequently, it not only is a waste of the power but also causes the delay of the start time of the search operation to discharge the bit lines 12 and 13. Moreover, the bit lines 12 and 13 have a large capacity, and all the bit lines must be discharged for the search. Thus, this causes problems of noise generated on a grounding conductor as well as the waste of an enormous amount of power. After the end of the search, the bit lines 12 and 13 must be precharged during the stand-by state to prepare for the read operation. In this process, the electric charge on the word match line 20, which is precharged before the search operation and is not discharged due to the data match, is wasted (discharged).
On the other hand, when a read request is received while the CAM prepares for the search operation in its stand-by state, all the bit lines must be charged to a precharge state before the read operation. In this process, all the word match lines are discharged. After the read, all the bit lines are discharged and all the word match lines are precharged. Consequently, in this case, the power is wasted, and the start of the read operation is delayed. Moreover, the noise on a power supply line must be taken into account due to electric current for charging the bit lines. Besides, the conventional CAM cell 10 of FIG. 1 has a drawback that the polarity (high or low) of the data on the bit lines 12 and 13 for the read (write) must be the reverse of the polarity for the search.
FIG. 2 shows an example of a conventional CAM word circuit. A plurality of CAM cells 10 are connected in parallel to the word match line 20. A signal on the word match line 20 is output as a match signal through a buffer 23. A precharge circuit 21 is connected to the word match line 20, and thus the word match line 20 is precharged in response to a precharge signal 22.
The CAM word circuit of FIG. 2 has a problem particularly related to the power consumption, as described below. That is, the CAM word circuit of FIG. 2 consumes a large amount of power, because the word match line 20 is discharged from a power supply potential to a ground potential at data mismatch words. In CAM, in its search operation, the input data is transferred to all of memory cells and then compared to the stored data. In the conventional circuit form including a constitution of FIG. 2, all of the word match lines in the words at the addresses whose data do not match the input word are discharged. Thus, the total power consumption is significantly influenced by the power for charging and discharging the word match line. Specifically, assuming that the total capacitance of the word match line is indicated by C, that the potential difference between the charge state and the discharge state is indicated by V and that the search frequency is indicated by f, the power consumption at the word match lines is equal to fCV.sup.2 and proportional to the square of the voltage amplitude V. Therefore, the high voltage amplitude of the word match line is very disadvantageous to the achievement of the lower power consumption.
An object of the present invention is to solve the above problems and more particularly to provide a CAM cell and a CAM word circuit which operate at high speed and consume low power.